high-side current monitor ixys cop y right ? ix ys corp ora t ion 2005 06/29/05 IXI848 features: ? high -side cu rre nt sense a m plifier ? 2.7v to 40v input ra nge ? 0.7% typical full scale accuracy ? scalabl e out put voltage ? soic pack age applications: ? powe r mana gement syste m s ? smart battery pac k s ? battery chargers ? battery powe red porta b le equipme n t ? dc moto r c o ntrol general description the IXI848 i s a pre c i s io n high si de curre n t se nse monitor. hig h side po we r-line monito ri ng offers the advantag e of allowing the groun d plan e to remain undi sturb ed whe n se nsi n g load cu rrents. an external sen s e resi st or set s the range of the amplified ground -refere n c ed outp u t monito ring voltage. th e output volt age i s amp lified by a sele ctabl e fixed gain of e i ther 10 o r 5 0 . with an input voltag e rang e u p to 4 0 v, and outp u t gain of u p to 50, the IXI848 is de signed to ad d r ess a wide variety of current sen s e a p p licatio ns. the IXI848 operates ove r a tempe r at ure ra nge of -40 c to +85 c. the ixi8 48 is availa b l e in an 8- lead soic p a ckag e. IXI848 functional block diagram and IXI848 soi c pin confi guration general ap plication circuit ordering information 5 4 1 3 2 8 r10 r50 vo u t gnd loa d in il loa d rs r 10 r 40 r zm + - r g r g s o ic-8 1 2 3 4 8 7 6 5 vo u t r10 r50 gnd in l o ad n/ c n/ c part no . des c rip t io n pack ag e qu an tity ixi84 8 s 1 s o i c - 8 98 (t ube) xi8 48s1t /r hig h side curre nt sense mon i tor s o i c - 8 2 5 0 0 (t & r )
ixys www.i x ys.com 2 06/29/05 IXI848 absolute maximum ratings parameter ratin g voltage to in (pin 4) -0.3v to +45v differenti a l inp u t voltage (v se n s e ) 0 . 4 v input curre nt to an y pi n 10ma operatin g amb i ent t e mp ran ge -40c to + 85c operatin g junc tion t e mp ran ge -40c to + 125 c j a 1 5 0 c/w jc 40c/w storage t e mp ran ge -65c to + 150 c lea d t e mperature (sol deri ng, 10 sec) + 300c absolute maxim u m rati n g s are stress ratings. stresses in excess of thes e ratings can caus e per ma nent d a mag e to th e dev ice. f u nction al oper ation of t he devic e at these or an y other cond itions bey ond th ose i n d i c a ted i n the o p e r ation a l sections of this data s heet is not i m p lie d. ex posur e of the device t o the abso l ute maxi mu m rati ngs for an exte nd ed p e rio d may deg rade th e d e vic e an d affect its reliabi lity. esd warning esd (electrostatic discharge) s ensitive device. alt hough the ixi84 8 feature prop rietar y esd protec t i on circuitry , pe r m anent damag e ma y be sustained if subjected to high ener g y electrostatic dischar ges. proper esd precautions are recomm ended to avoid perform ance deg radation or loss o f functionality . electrical characteristics t a = 25c, v in = 2.7v to 40v, unl ess other w i se noted parameter sy mbol conditio n s min ty p max unit operatin g volt age ran ge v in 2 . 7 40 v supp l y curre nt i in v in = 20v, v sen se = 0 v , i load = 0 a . 0 6 5 . 1 3 0 m a f u ll scal e sen s e voltag e v sen se 1 5 0 m v input offset voltag e v os v in = 12v -2.0 0.5 2.0 mv f u ll scal e accurac y v sen se = 100mv, v in = 12v t a = +2 5 c 0 . 7 % t a = +25c 0.7 v sen se = 100mv v in = 12v ? @ t a = -40 to +85c 0.3 % t a = +25c 0.8 t o tal ou t voltage error (note 1, note 2 ) v sen se = 100mv v in = 40v ? @ t a = -40 to +85c 0.4 % t a = +2 5 c 0.5 gain accurac y (note 2) v sen se = 20mv to 100mv v in = 12v, 40v ? @ t a = -40 to + 85c 0.1 % gain = 10v/v 23 33 43 k ? gain setting resistance r g v in = 12v v sen se = 100mv gain = 50v/v 115 165 215 k ? note 1: t o tal ou t voltage err o r is the sum of gain and offset voltage erro rs. note 2: pro duction tested at t a = 25c.
ixys www.ixys.com 3 06/29/05 IXI848 pin description and configuration soic name description 1 gnd ground 2 r10 connecting r10 to gnd, (r50=n/c) selects a vout voltage that is 10x the voltage across r sense . 3 vout output voltage proportional to the voltage across r sense . 4 in positive supply terminal and power connecti on for the external sense resistor. 5 load load-side connection to the external sense resistor. 6 n/c no connect 7 n/c no connect 8 r50 connecting r50 to gnd, (r10=n/c) selects a vout voltage that is 50x the voltage across r sense . detailed circuit description the IXI848 is a precision high side current sense monitor featuring an input voltage range of 2.7v to 40v, and a selectable ground referenced fixed gain output of either 10 or 50. a small voltage developed across an external sense resistor (r s ), is converted to an amplified ground referenced voltage output at vout, (figure 1). the amplifier?s non-inverting input is high impedance making the voltage at that terminal equal to v in ? (i l ) (r s ). the amplifier forces the high impedance inverting terminal to equal the non-inverting input voltage by turning on the p-channel mos fet. as the p-channel mos fet is biased on by the amplifier output, current is sourced through r g (10r or 10r+40r), to produce a voltage equal to v in ? (i l ) (r s ) at the inverting input of the amplifier. this develops a voltage across the inverting input resistor, r that matches the sense voltage across r s , plus any associated input offset voltage, (v io ). consequently, the voltage at vout corresponds to r g / r. output: vout = g [ (i l ) (r s ) + v io ] gain: g = (r g ) (z m ) / r (r g (r g + z m )) r g = 10r or 50r selectable temperature coefficient: (all on-chip resistors) r = 700ppm / c typical r sense component selection the r sense value should be selected such that the voltage across r sense is at full-scale for the load current to be monitored. operating the IXI848 at or near the full-scale sense voltage will minimize the error component associated with the input offset voltage of the internal op amp. the IXI848 can be configured to measure a wide selection of currents by using different r sense values. some common values for typical operation of the IXI848 are listed in the following table. full-scale i l (a) r sense r s ( ? ) gain (v/v) vout (v) v sense = 150mv 0.15 1.0 10 1.5 1.5 0.1 10 1.5 5 0.01 50 2.5 100 0.001 50 5 output impedance the vout output is a current source driving a 33k ? resistance to ground for a gain of 10, or a 165k ? resistance to ground for a gain of 50. output gain is reduced by resistive loading of the vout terminal. the impedance of the external monitor load (z m ) should be chosen high enough to maintain the desired accuracy. buffering of the vout terminal with a high-impedance input stage may be required to minimize output errors. the following formulas quantify the percent error introduced by output loading: for a gain of 10 % error = 100 [r load / (33k ? + r load ) ? 1] for a gain of 50 % error = 100 [r load / (165k ? + r load ) ? 1] r load = the external load applied to vout
ixys www.i x ys.com 4 06/29/05 IXI848 t y pical performance characteristics .0 05 .0 25 .0 45 .0 65 .0 85 .1 05 .1 25 2.7 5 10 15 20 25 30 3 5 40 s upply curre nt (ma ) supply voltage ( v in) .0 50 .0 55 .0 60 .0 65 .0 70 .0 75 .0 80 -40 - 15 10 3 5 60 85 ta ( c ) s u p p ly c u rrent ( m a ) vi n = 20v f i g 3. suppl y current vs. vol t age f i g 4. suppl y current vs. t e mperatur e 5mv / d i v 10 0mv 95mv v s ens e 20 m v / d iv v out 1v 0.9 5 v 2u s/d i v c l =8p f v i n = 12v ga i n =10 500 m v / d iv 45 mv /d iv v s ens e 6mv 100 m v c l =8 pf v out 1v 0. 06v v i n = 12v ga i n = 1 0 2us / d iv f i g 5. small si gna l t r ansient resp onse 10 x f i g 6. large si gna l t r ansient resp onse 10 x v s ens e 5mv / d i v vou t 100 m v / d iv c l =8 pf 10 0mv 95 m v 5v 4. 7 5 v vin = 12 v 10u s / d i v ga i n =5 0 v s ens e 45 m v / d iv vo ut 2v/ d iv 10u s / d i v 100mv 6mv 5v 0. 3v c l =8p f vin = 12 v ga i n =5 0 f i g 7. small si gna l t r ansient resp onse 50 x f i g 8. large si gna l t r ansient resp onse 50 x
ixys www.i x ys.com 5 06/29/05 IXI848 package outline 8-lead soi c ix y s cor poratio n makes no representations or w a rra nties w i th r e s pect to the accurac y or compl e teness of the contents of this publication and reserves the right to make chang es to specificatio ns and product descrip tions at a n y time w i thout notice. neith er circuit patent lice n ses nor indemn i ty are expr esse d or implied. exc ept as set fort h in ix y s ? stan dar d terms and c o nditions of s ale, ix y s co rpo r atio n assumes no liability w hatsoev er, and disclaim s an y e x pressed or implied w a rrant y , relating t o its products including, but not limited to, the implied warrant y of merchantabilit y , f i tness for a p a rticular purpose, o r i n fringement of a n y intellectual propert y right .
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